SH7280 Datasheet, PDF (1665/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 31 Electrical Characteristics
31.3.6 MTU2, MTU2S Module Timing
Table 31.10 MTU2, MTU2S Module Timing
Conditions: V_CC = 3.0 to 5.5 V, AV_CC = AVREF = 4.5 to 5.5 V,
V_SS = PLLV_SS = AVREFVSS = AV_SS = 0 V,
Ta = −20°C to +85°C (Consumer specifications),
Ta = −40°C to +85°C (Industrial specifications)
Item
Symbol Min.
Output compare output delay time
Input capture input setup time
Timer input setup time
Timer clock pulse width (single edge)
Timer clock pulse width (both edges)
Timer clock pulse width
(phase counting mode)
t_TOCD
t
TICS
t
TCKS
t_TCKWH/L
t
TCKWH/L
t_TCKWH/L

t /2 + 20
cyc
t + 20
cyc
1.5
2.5
2.5
Note:
t
pcyc
indicates
peripheral
clock
(Pφ)
cycle.
Max.
50





Unit
ns
ns
ns
t_pcyc
t
pcyc
t_pcyc
Figure
Figure 31.41
Figure 31.42
CK
Output compare
output
Input capture
input
t_TOCD
t_TICS
Figure 31.41 MTU2, MTU2S Input/Output Timing
CK
TCLKA
to TCLKD
t_TCKS
t_TCKS
t_TCKWL
t_TCKWH
Figure 31.42 MTU2, MTU2S Clock Input Timing
Rev. 1.00 Jun. 26, 2008 Page 1635 of 1692
REJ09B0393-0100