SH7280 Datasheet, PDF (338/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 9 Bus State Controller (BSC)
Table 9.8 32-Bit External Device Access and Data Alignment in Little-Endian Mode (Only
in SH7286)
Data Bus
Operation
D31 to D24 D23 to D16 D15 to D8 D7 to D0
Byte access at 0



Data 7 to 0
Byte access at 1


Data 7 to 0 
Byte access at 2

Data 7 to 0 

Byte access at 3
Data 7 to 0 


Word access at 0


Data 15 to 8 Data 7 to 0
Word access at 2
Data 15 to 8 Data 7 to 0 

Longword access at Data 31 to 24 Data 23 to 16 Data 15 to 8 Data 7 to 0
0
Strobe Signals
WRHH, WRHL, WRH, WRL,
DQMUU DQMUL DQMLU DQMLL



Assert


Assert 

Assert 

Assert 




Assert Assert
Assert Assert 

Assert Assert Assert Assert
Table 9.9 16-Bit External Device Access and Data Alignment in Little-Endian Mode
Data Bus
Operation
D15 to D8
D7 to D0
Byte access at 0

Data 7 to 0
Byte access at 1
Data 7 to 0

Byte access at 2

Data 7 to 0
Byte access at 3
Data 7 to 0

Word access at 0
Data 15 to 8
Data 7 to 0
Word access at 2
Data 15 to 8
Data 7 to 0
Longword
access at 0
1st time at 0 Data 15 to 8
2nd time at 2 Data 31 to 24
Data 7 to 0
Data 23 to 16
Strobe Signals
WRH, DQMLU WRL, DQMLL

Assert
Assert


Assert
Assert

Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Rev. 1.00 Jun. 26, 2008 Page 308 of 1692
REJ09B0393-0100