SH7280 Datasheet, PDF (745/1726 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

Section 13 Port Output Enable 2 (POE2)
13.4 Operation
Table 13.4 shows the target pins for high-impedance control and conditions to place the pins in
high-impedance state.
Table 13.4 Target Pins and Conditions for High-Impedance Control
Pins
Conditions
MTU2 high-current pins
(PE9/TIOC3B and
PE11/TIOC3D)
Input level detection,
output level comparison, or
SPOER setting
MTU2 high-current pins
(PE12/TIOC4A and
PE14/TIOC4C)
Input level detection,
output level comparison, or
SPOER setting
MTU2 high-current pins
(PE13/TIOC4B and
PE15/TIOC4D)
Input level detection,
output level comparison, or
SPOER setting
MTU2S high-current pins Input level detection,
(PE5/TIOC3BS and
output level comparison, or
PE6/TIOC3DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PE0/TIOC4A and
output level comparison, or
PE2/TIOC4CS)
SPOER setting
MTU2S high-current pins Input level detection,
(PE1/TIOC4BS and
output level comparison, or
PE3/TIOC4DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD10/TIOC3BS and
output level comparison, or
PD11/TIOC3DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD12/TIOC4AS and
output level comparison, or
PD14/TIOC4CS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD13/TIOC4BS and
output level comparison, or
PD15/TIOC4DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD29/TIOC3BS and
output level comparison, or
PD28/TIOC3DS)
SPOER setting
Detailed Conditions
MTU2P1CZE
((POE3F+POE2F+POE1F+POE0F) +
(OSF1 • OCE1) + (MTU2CH34HIZ))
MTU2P2CZE
((POE3F+POE2F+POE1F+POE0F) +
(OSF1 • OCE1) + (MTU2CH34HIZ))
MTU2P3CZE
((POE3F+POE2F+POE1F+POE0F) +
(OSF1 • OCE1) + (MTU2CH34HIZ))
MTU2SP1CZE
((POE4F+POE5F+POE6F+POE7F) +
(OSF2 • OCE2) + (MTU2SHIZ))
MTU2SP2CZE
((POE4F+POE5F+POE6F+POE7F) +
(OSF2 • OCE2) + (MTU2SHIZ))
MTU2SP3CZE
((POE4F+POE5F+POE6F+POE7F) +
(OSF2 • OCE2) + (MTU2SHIZ))
MTU2SP4CZE
((POE4F+POE5F+POE6F+POE7F)
+(OSF2 • OCE2) + (MTU2SHIZ))
MTU2SP5CZE
((POE4F+POE5F+POE6F+POE7F)
+(OSF2 • OCE2) + (MTU2SHIZ))
MTU2SP6CZE
((POE4F+POE5F+POE6F+POE7F)
+(OSF2 • OCE2) + (MTU2SHIZ))
MTU2SP7CZE
((POE4F+POE5F+POE6F+POE7F)
+(OSF2 • OCE2) + (MTU2SHIZ))
Rev. 1.00 Jun. 26, 2008 Page 715 of 1692
REJ09B0393-0100