SH7065 Datasheet, PDF (902/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Appendix C I/O Port Block Diagrams
PDR
RES
PDnDR
PDW
Dout
Internal
data bus
Dn
Bus
released
Mode 1
Single-chip mode
PFC
PDnMD
Modes 2/3/4
Din
Standby
PDnIOR
SBYCR
HIZ
Legend:
PDR: Port D read signal
PDW: Port D write signal
RES: Reset signal
Dout: Data bus output timing signal
Din: Data bus input timing signal
Note: n = 0 to 7
Figure C.19 PDn/Dn Block Diagram (for Mask ROM version)
Rev. 5.00 Sep 11, 2006 page 880 of 916
REJ09B0332-0500