SH7065 Datasheet, PDF(29/941 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

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SH7065 Datasheet, PDF (29/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

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Section 1 Overview

Item

Operating modes

Clock pulse

generator (CPG)

Package

Product lineup

Specifications

â¢ Operating modes

ï£§ Expanded ROMless mode

ï£§ Expanded ROM mode

ï£§ Single-chip mode

â¢ Processing states

ï£§ Program execution state

ï£§ Exception handling state

ï£§ Bus-released state

â¢ Power-down modes

ï£§ Sleep mode

ï£§ Hardware standby mode

ï£§ Software standby mode

ï£§ Module standby function

ï£§ Module clock division function

â¢ Built-in clock pulse generator

â¢ Selection of crystal or external clock as clock source

â¢ Built-in clock-multiplication PLL circuits

â¢ Built-in PLL circuit for phase synchronization between external clock and

internal clock

â¢ Internal clock and on-chip peripheral module clock frequencies can be

scaled independently

176-pin plastic LQFP (LQFP2424-176), 0.5 mm pitch

SH7065: 256 kB flash/mask

Operating frequency: 60 MHz (max.)

Rev. 5.00 Sep 11, 2006 page 7 of 916

REJ09B0332-0500

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