SH7065 Datasheet, PDF (54/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 2 CPU
2.2 Data Formats
2.2.1 Register Data Formats
The register operand data size is always longword (32 bits). When data in memory is loaded into a
register, if the memory operand data size is byte (8 bits) or word (16 bits), it is sign-extended to
longword length.
31
0
Longword
Figure 2.5 Register Data Format
2.2.2 Memory Data Formats
Byte, word, and longword data formats can be used.
Byte data can be located at any address, while word data must start at address 2n and longword
data at address 4n. If data is accessed other than at these boundaries, an address error will result,
and the result of the access cannot be guaranteed. In particular, since the program counter (PC)
and status register (SR) are stored in longword format in the stack area indicated by the stack
pointer (SP: R15), the setting musty be made so that stack pointer value is 4n.
Address 2n
Address 4n
Address m + 1 Address m + 3
Address m
Address m + 2
31
23
15
7
0
Byte Byte
Byte Byte
Word
Word
Longword
Address m + 3
Address m + 1
Address m + 2
Address m
31
23
15
7
0
Byte Byte
Byte Byte
Word
Word
Longword
Address 2n
Address 4n
Big-endian
Little-endian
Figure 2.6 Memory Data Format
Rev. 5.00 Sep 11, 2006 page 32 of 916
REJ09B0332-0500