SH7065 Datasheet, PDF (563/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 14 Serial Communication Interface (SCI)
SCBRR is initialized to H'FF by a reset, by the module standby function, and in software standby
mode and hardware standby mode.
The SCBRR setting is found from the following equations.
Asynchronous mode:
Pφ
N=
64 × 2^2n–1 × B
× 10⁶ – 1 (When operating on a base clock of 16 times the bit rate)
Pφ
N=
32 × 2^2n–1 × B
× 10⁶ – 1 (When operating on a base clock of 8 times the bit rate)
Pφ
N=
16 × 2^2n–1 × B
× 10⁶ – 1 (When operating on a base clock of 4 times the bit rate)
Synchronous mode:
Pφ
N=
8 × 2^2n–1 × B
× 10⁶ – 1
Where B: Bit rate (bits/s)
N: SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
Pφ: Peripheral module operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
SCSMR Settings
n
Clock
CKS1
CKS0
0
Pφ
0
0
1
Pφ/4
0
1
2
Pφ/16
1
0
3
Pφ/64
1
1
Rev. 5.00 Sep 11, 2006 page 541 of 916
REJ09B0332-0500