SH7065 Datasheet, PDF (461/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
Timing of Counter Clearing by Compare Match/Input Capture
Figure 10.37 shows the timing when counter clearing by compare match occurrence is specified,
and figure 10.38 shows the timing when counter clearing by input capture occurrence is specified.
Pφ
Compare match
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 10.37 Counter Clear Timing (Compare Match)
Pφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 10.38 Counter Clear Timing (Input Capture)
Rev. 5.00 Sep 11, 2006 page 439 of 916
REJ09B0332-0500