SH7065 Datasheet, PDF (583/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 14 Serial Communication Interface (SCI)
Initialization
Clear TE and RE bits to 0
in SCSCR
1
Set TFRST and RFRST bits to 1
in SCFCR, and clear FIFO buffer
Read BRK, DR, and ER flags
in SC2SSR, then clear them
by writing 0
Set RIE, MPIE, TEIE, CKE1
and CKE0 bits in SCSCR (leaving 2
TE and RE bits cleared to 0)
Set transmit/receive format
in SCSMR
3
Set value in SCBRR
4
Wait
1-bit interval elapsed?
No
Yes
Set RTRG1–0 and TTRG1–0
bits in SCFCR, and clear
TFRST and RFRST bits to 0
PFC setting for external pins
used (SCK, TxD, RxD)
5
Set TIE bit in SCSCR
6
Set the TE and RE bits to 1 in ₇
SCSCR
End
1. Clear bits TE and RE to 0 before end of
initialization.
2. Set disabling/enabling of RXI, and TEI
interrupt requests. When enabling an
interrupt request, also make a setting in
the IPRK register of the INTC.
3. Set the transmit/receive format in
SCSMR.
When using IrDA mode, also set
SCIMR.
4. Write a value corresponding to the bit
rate to the bit rate register (SCBRR).
Not necessary if an external clock is
used. Wait for at least one bit interval
after making this setting.
5. Make PFC settings for the external pins
to be used.
Make a setting for RxD input when
receiving, and for TxD output when
transmitting. Make an SCK input/output
setting according to the setting of bits
CKE1 and CKE0.
An SCK pin setting is not necessary
when CKE1 and CKE0 are cleared to 0
in asynchronous mode.
When serial clock output is set, clock
output from the SCK pin begins at this
point.
6. When the TXI interrupt is used, first
clear TFRST and RFRST in SCFCR to
0. Even if TE = 0, a TXI interrupt will be
generated as soon as the TIE bit in
SCSCR is set to 1.
7. Set the TE bit or RE bit in SCSCR to 1.
Setting the TE and RE bits enables the
TxD, RxD and SCK pins to be used.
When transmitting, the TxD pin will go
to the mark state; when receiving, RxD
pin will go to the idle state, waiting for a
start bit.
Figure 14.4 Sample SCI Initialization Flowchart
Rev. 5.00 Sep 11, 2006 page 561 of 916
REJ09B0332-0500