SH7065 Datasheet, PDF (243/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

8.1.2 Block Diagram
Figure 8.1 shows a block diagram of the BSC.
Section 8 Bus State Controller (BSC)
WAIT
CSn
BS, RD, WR,
RDWR, WRxx,
RASn, CASxxn,
xxBS, OEn, AH
Interrupt
controller
Wait
control unit
Area
control unit
Memory
control unit
Refresh
control unit
WCR
ACR
BCR
DCR
Bus
interface
RFCR
RTCNT
Comparator
RTCOR
RTCSR
Legend:
WCR: Wait control register
ACR: Area control register
BCR: Bus control register
DCR: DRAM control register
RFCR: Refresh count register
RTCNT: Refresh timer count register
RTCOR: Refresh time constant register
RTCSR: Refresh timer control/status register
Figure 8.1 Block Diagram of BSC
BSC
Rev. 5.00 Sep 11, 2006 page 221 of 916
REJ09B0332-0500