SH7065 Datasheet, PDF (46/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 2 CPU
Figure 2.2 shows the control register, and table 2.1 shows the bits in the SR register.
Status register (SR)
31 28 27
16 15 12 11 10 9 8 7
4 3 2 10
0000 RC 0000 DMY DMX M Q IMASK RF1 RF0 S T
Repeat start register (RS)
31
0
RS
Repeat end register (RE)
31
0
RE
Global base register (GBR)
31
0
GBR
Vector base register (VBR)
31
0
VBR
Modulo register (MOD)
31
16 15
0
ME
MS
Legend:
ME: Modulo end address
MS: Modulo start address
Figure 2.2 Control Register Configuration
Rev. 5.00 Sep 11, 2006 page 24 of 916
REJ09B0332-0500