SH7065 Datasheet, PDF (7/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

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9.3.4 Types of DMA 340
Transfer
Relationship between
DMA Transfer Type,
Request Mode, and Bus
Mode
Table 9.6 Relationship
between DMA Transfer
Type, Request Mode,
and Bus Mode
• Notification of change in company name amended
(Before) Hitachi, Ltd. → (After) Renesas Technology Corp.
Table amended
Address
Mode Type of Transfer
Request Bus
Mode Mode
Dual
External memory and external memory Any^*1
B/C
External memory and memory-mapped Any^*1
B/C
external device
Memory-mapped external device and Any^*1
B/C
memory-mapped external device
External memory and on-chip memory Any^*1
B/C
External memory and on-chip
peripheral module
Any^*2
B/C
Memory-mapped external device and Any^*1
B/C
on-chip memory
Memory-mapped external device and Any^*2
B/C
on-chip peripheral module
On-chip memory and on-chip memory Any^*1
B/C
On-chip memory and on-chip peripheral Any^*2
B/C
module
On-chip peripheral module and on-chip Any^*2
B/C
peripheral module
Transfer Usable
Size (Bits) Channels
8/16/32
0–3
8/16/32
0–3
8/16/32
0–3
8/16/32
0–3
8/16/32^*3 0–3
8/16/32
0–3
8/16/32^*3 0–3
8/16/32
0–3
8/16/32^*3 0–3
8/16/32^*3 0–3
11.6 Usage Notes
484
Description added
15.7.2 Handling of
Analog Input Pins
Pay Attention to the Notices Below, When a Value Is Written
into the Timer General Register U (TGRU), Timer General
Register V (TGRV), Timer General Register W (TGRW), and in
Case of Written into Free Operation Address (*): …
Writing Operation into Timer Period Data Register (TPDR) and
Timer Dead Time Data Register (TDDR) When MMT Is
Operating: …
Notes on Halting TCNT Counter Operation: …
619, 620 Description of preliminary deleted
Figure 15.8 Example
of Analog Input Pin
Protection Circuit
Figure 15.9 Analog
Input Pin Equivalent
Circuit
Table 15.5 Analog
Input Pin
Specifications
Rev. 5.00 Sep 11, 2006 page vii of xxii