SH7065 Datasheet, PDF (604/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 14 Serial Communication Interface (SCI)
Transfer
direction
Serial clock
Serial data
LSB
Bit 0
Bit 1
MSB
Bit 7
Bit 0
Bit 1
Bit 6 Bit 7
TDFE
TEND
TXI interrupt
request
Data written to SCFTDR
and TDFE flag cleared to
0 by TXI interrupt handler
TXI interrupt
request
TEI interrupt
request
One frame
Figure 14.19 Example of SCI Transmit Operation
Serial Data Reception (Synchronous Mode): Figures 14.20 and 14.21 show a sample flowchart
for serial reception.
Use the following procedure for serial data reception after enabling the SCI for reception.
When changing the operating mode from asynchronous to synchronous without resetting
SCFRDR and SCFTDR by means of SCI initialization, be sure to check that the ORER, PER3 to
PER0, and FER3 to FER0 flags are all cleared to 0. The RDF flag will not be set if any of flags
FER3 to FER0 or PER3 to PER0 are set to 1, and neither transmit nor receive operations will be
possible.
Rev. 5.00 Sep 11, 2006 page 582 of 916
REJ09B0332-0500