SH7065 Datasheet, PDF (783/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

;
EWait_1
;
;
LDC
MOV.L
MOV,L
MOV.L
OR.B
SUBC
BF
MOV.L
MOV.W
MOV.W
MOV.L
;
EraseLoop
;
EWait_2
;
EWait_3
;
EWait_4
MOV.L
MOV.W
MOV.W
MOV.L
MOV.L
OR.B
SUBC
BF
MOV.L
OR.B
SUBC
BF
MOV.L
AND.B
SUBC
R0,GBR
#1,R2
Section 19 256 kB Flash Memory (F-ZTAT)
; Initialize GBR
#EWait_X,R3
#FLMCR1,R0
#SWESET,@(R0,GBR)
R2,R3
EWait_1
#0,R9
; Set SWE
; Wait 1 µs
; Initialize n (R9) to 0
@(6,R5),R0
R0,@(EBR1,GBR)
@R5,R6
; Erase memory block (EBR1/2) setting
; Erase memory block start address →
; R6 setting
.EQU
#WDT_TCSR,R1
#WDT_4m,R3
R3,@R1
$
; Enable WDT
; 4.4 ms cycle
#EWait_Y,R3
#FLMCR1,R0
#ESUSET,@(R0,GBR)
R2,R3
EWait_2
; Set ESU
; Wait 100 µs
#EWait_Z,R3
#ESET,@(R0,GBR)
R2,R3
EWait_3
; Set E
; Wait 10 ms
#EWait_a,R3
#ECLEAR,@(R0,GBR)
R2,R3
; Clear E
; Wait 10 µs
Rev. 5.00 Sep 11, 2006 page 761 of 916
REJ09B0332-0500