SH7065 Datasheet, PDF (370/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 9 Direct Memory Access Controller (DMAC)
CKE
DREQ
FIFO
14 15 16 16 16 16 16 15 15 15 14 14 14 13 13
DRAK
BUS
DACK
CPU CPU
CPU
CPU
CPU
CPU
CPU
DMA DMA
(R) (W)
CPU
DMA
(R)
DMA
(W)
CPU
DMA DMA
(R) (W)
CPU
Notes: 1. CKE:CKM = 1:1
2. Cycle steal mode/dual address transfer
3. Low level detection using 16-stage FIFO
4. DRAK and DACK are active-low.
Figure 9.15 Operation Example:
CKE = CKM, Low Level Detection, 16-Stage FIFO Used (2)
Sampling Operation when FIFO = FULL
(Dual Address/Cycle Steal Mode)
Rev. 5.00 Sep 11, 2006 page 348 of 916
REJ09B0332-0500