SH7065 Datasheet, PDF (404/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
Bits 7 to 4— I/O Control B3 to B0 (IOB3 to IOB0)
I/O Control D3 to D0 (IOD3 to IOD0):
IOB3 to IOB0 specify the function of TGRB.
IOD3 to IOD0 specify the function of TGRD.
Channel
0
Bit 7:
IOB3
0
1
Legend:
*: Don’t care
Bit 6:
IOB2
0
1
0
1
Bit 5:
IOB1
0
1
0
1
0
1
*
Bit 4:
IOB0
0
1
0
1
0
1
0
1
0
1
*
*
Description
TGR0B is
output
compare
register
Output disabled
(Initial value)
Initial output
is 0 output
0 output at
compare match
1 output at
compare match
Toggle output at
compare match
Output disabled
Initial output
is 1 output
0 output at
compare match
1 output at
compare match
Toggle output at
compare match
TGR0B is Capture input
input capture source is
register
TIOC0B pin
Input capture at
rising edge
Input capture at
falling edge
Input capture at
both edges
Capture input
source is
channel
1/count clock
Input capture at
TCNT1 count-
up/count-down
Rev. 5.00 Sep 11, 2006 page 382 of 916
REJ09B0332-0500