SH7065 Datasheet, PDF (776/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 19 256 kB Flash Memory (F-ZTAT)
;
MOV.L
MOV
MOV.B
WAIT_6 DT
BF
;
MOV.L
MOV.L
MOV
MOV
MOV
MOV.L
;
VERIFYLOOP
MOV.L
MOV.L
MOV.L
WAIT_7 DT
BF
;
MOV.L
MOV.L
CMP/EQ
BT
MOV
;
VERIFY_OK
MOV
CMP/GE
BF
MOV.L
OR
MOV.L
;
#WAIT_C,R2
#PVSET,R0
R0,@(FLMCR1,GBR)
R2
WAIT_6
; Set PV
; Wait 4 µs
#ADATABUFF,R9
#RDATABUFF,R7
R11,R1
R12,R3
#32,R6
#H'FFFFFFFF,R4
.EQU $
R4,@R3
R4,@R9
#WAIT_D,R2
R2
WAIT_7
@R3+,R2
@R1+,R0
R2,R0
VERIFY_OK
#1,R5
; Write H'FF to verify address
; Additional program data RAM (ADATABUFF) initialization
; Wait 2 µs
; Read verify data
; Read program data (source data)
; Verify check
; If verify NG, assign 1 to M
.EQU $
#6,R8
R14,R8
NO_ADWRT
@R7,R10
R2,R10
R10,@R9
; 6 or more writes?
; Read reprogram data
; Additional program data operation
; Store in additional program data RAM (ADATABUFF)
Rev. 5.00 Sep 11, 2006 page 754 of 916
REJ09B0332-0500