SH7065 Datasheet, PDF (410/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
Channel
4
Bit 7:
IOB3
0
1
Legend:
*: Don’t care
Bit 6:
IOB2
0
1
0
1
Bit 5:
IOB1
0
1
0
1
0
1
*
Bit 4:
IOB0
0
1
0
1
0
1
0
1
0
1
*
*
Description
TGR4B is
output
compare
register
Output disabled
(Initial value)
Initial output
is 0 output
0 output at
compare match
1 output at
compare match
Toggle output at
compare match
Output disabled
Initial output
is 1 output
0 output at
compare match
1 output at
compare match
Toggle output at
compare match
TGR4B is Capture input
input capture source is
register
TIOC4B pin
Input capture at
rising edge
Input capture at
falling edge
Input capture at
both edges
Capture input
source is
TGR3C
compare
match/input
capture
Input capture at
generation of
TGR3C compare
match/input
capture
Rev. 5.00 Sep 11, 2006 page 388 of 916
REJ09B0332-0500