SH7065 Datasheet, PDF (763/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 19 256 kB Flash Memory (F-ZTAT)
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
— RAMAS RAMS RAM2 RAM1 RAM0
Initial value:
0
0
0
0
0
0
0
0
R/W: R
R
R
R/W
R/W
R/W
R/W
R/W
Bits 15 to 5—Reserved: These bits are always read as 0.
Bit 4—RAM Address Select (RAMAS): Selects the RAM addresses to be used for flash memory
emulation. This bit is ignored in the on-chip ROM disabled modes (MCU modes 2, 3, and 4).
Bit 4: RAMAS
0
1
Description
RAM addresses H'FFFF8000 to H'FFFF8FFF are used for emulation
(Initial value)
RAM addresses H'FFFFA000 to H'FFFFAFFF are used for emulation
Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected. This bit is ignored
in the on-chip ROM disabled modes (MCU modes 2, 3, and 4).
Bit 3: RAMS
0
1
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled(Initial value)
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
Rev. 5.00 Sep 11, 2006 page 741 of 916
REJ09B0332-0500