SH7065 Datasheet, PDF (605/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 14 Serial Communication Interface (SCI)
Initialization
1
Start of reception
Read ORER flag in SC1SSR
ORER = 1?
No
Yes
2
Error handling
Read RDF flag in SC1SSR ³
No
RDF = 1?
Yes
Read receive data from SCFRDR,
and clear RDF flag to 0
4
in SC1SSR
No
All data received?
Yes
Clear RE bit to 0 in SCSCR
End of reception
1. SCI initialization:
See figure 14.17, Sample SCI
Initialization Flowchart.
2. Receive error handling:
If a receive error occurs, read the
ORER flag in SC1SSR , and after
performing the appropriate error
handling, clear the ORER flag to
0. Transmission/reception cannot
be resumed if the ORER flag is
set to 1.
3. SCI status check and receive data
read:
Read the serial status 1 register
(SC1SSR) and check that the
RDF flag is set to 1, then read
receive data from the receive
FIFO data register (SCFRDR) and
clear the RDF flag to 0. Transition
of the RDF flag from 0 to 1 can
also be identified by an RXI
interrupt.
4. Serial reception continuation
procedure:
To continue serial reception, read
at least the receive trigger set
number of data bytes from
SCFRDR, and write 0 to the RDF
flag after reading 1 from it. The
number of receive data bytes in
SCFRDR can be ascertained by
reading the lower 8 bits of the
FIFO data count register
(SCFDR). (The RDF bit is cleared
automatically when the DMAC is
activated by an RXI interrupt and
the SCFRDR value is read.)
Figure 14.20 Sample Serial Reception Flowchart (1)
Rev. 5.00 Sep 11, 2006 page 583 of 916
REJ09B0332-0500