SH7065 Datasheet, PDF (671/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 17 Pin Function Controller (PFC)
Bits 1 and 0—PA16 Mode 1 and 0 (PA16MD1, PA16MD0): These bits select the function of
the PA16/WRHH/HHBS/TCLKC/TIOC3A pin.
Bit 1: PA16MD1
0
1
Bit 0: PA16MD0
0
1
0
1
Description
General input/output (PA16)
(Initial value)
(WRHH or HHBS in on-chip ROM disabled modes)
Byte write output (WRHH) or byte strobe output (HHBS)
(PA16 in single-chip mode)
TPU clock input (TCLKC)
TPU input capture input/output compare output
(TIOC3A)
17.3.4 Port A Control Registers L1 and L2 (PACRL1, PACRL2)
Port A control registers L1 and L2 (PACRL1, PACRL2) are 16-bit readable/writable registers that
select the functions of pins in port A.
PACRL1 selects the functions of port A pins PA15/WRHL/HLBS/TCLKD/TIOC3B to
PA8/RAS0, and PACRL2 selects the functions of port A pins PA1/OE1 and PA0/OE0.
Port A includes bus control signals (WRHL, WRLH, WRLL, HLBS, LHBS, LLBS, WAIT,
RAS0, RAS1, OE0, and OE1), but register settings relating to the selection of these pin functions
may not be valid in all operating modes. For details, see table 17.10, Pin Functions in Each
Operating Mode.
PACRL1 and PACRL2 are initialized to H'0000 by an external power-on reset, but are not
initialized by a WDT reset, in standby mode, or in sleep mode.
Rev. 5.00 Sep 11, 2006 page 649 of 916
REJ09B0332-0500