SH7065 Datasheet, PDF (288/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 8 Bus State Controller (BSC)
CKE*
A25–A0
CSn
WR
RD
HHBS
Asserted
only when
BAS = 1
HLBS
LHBS
LLBS
D31–D24
D23–D16
D15–D8
D7–D0
BS
DACKn
Address 0
byte access
T1 T2
Address 1
byte access
T1 T2
Address 2
byte access
T1 T2
Address 3
byte access
T1 T2
Note: * When the setting CKE = CKIO is made in clock mode 0 to 3, 6, or 7, CKE is identical to CKIO
on the timing chart.
In clock modes 4 and 5, the phases of CKE and CKIO do not coincide, but the relative
relationship of the AC specifications is the same as in the other clock modes.
Figure 8.14 Byte Access Control Timing
(32-Bit Bus Width, Big-Endian Mode, No Waits, Read Cycle)
Rev. 5.00 Sep 11, 2006 page 266 of 916
REJ09B0332-0500