SH7065 Datasheet, PDF (536/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 13 Watchdog Timer
TCNT value
H'FF
Overflow
H'00
WT/IT = 1 H'00 written
TME = 1 to TCNT
WOVF = 1
WDTOVF and internal
reset are generated
Time
WT/IT = 1 H'00 written
TME = 1 to TCNT
WDTOVF
signal
Internal reset
signal*
128 (WDT) clocks
512 (WDT) clocks
Legend:
WT/IT: Timer mode select bit
TME: Timer enable bit
Note: * The internal reset signal is generated only if the RSTE bit is set to 1.
Figure 13.4 Operation in Watchdog Timer Mode
Rev. 5.00 Sep 11, 2006 page 514 of 916
REJ09B0332-0500