SH7065 Datasheet, PDF (318/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 8 Bus State Controller (BSC)
Table 8.12 Number of Idle Cycles in Consecutive Accesses to External Space (CKE Basis)
Mφ:CKE = 1:1
Mφ:CKE = 1:1/2
Mφ:CKE = 1:1/4
Type of
Access
Number of
Waits Set
by Idle
Function^*
Consecutive
accesses to
same CS
space
Read → Read
Read → Write
Invalid
0
1
2
3221
4332
4332
4332
2221
3332
3332
3332
2111
3222
3222
3222
3
4333
3333
3333
4
4444
4444
4444
5
5555
5555
5555
6
6666
6666
6666
7
7777
7777
7777
Write → Read Invalid
2221
2221
1111
Write → Write Invalid
3332
3332
2222
Consecutive
access to
other CS
space
Read → Read 0
1
2
3
3221
3221
3222
3333
2221
2221
2222
3333
2111
2111
2222
3333
4
4444
4444
4444
5
5555
5555
5555
6
6666
6666
6666
7
7777
7777
7777
Read → Write 0
1
4332
4332
3332
3332
3222
3222
2
4332
3332
3222
3
4333
3333
3333
4
4444
4444
4444
5
5555
5555
5555
6
6666
6666
6666
7
7777
7777
7777
Write → Read 0
2221
2221
1111
1
2221
2221
1111
2
2222
2222
2222
3
3333
3333
3333
4
4444
4444
4444
5
5555
5555
5555
6
6666
6666
6666
7
7777
7777
7777
Write → Write 0
1
3332
3332
3332
3332
2222
2222
2
3332
3332
2222
3
3333
3333
3333
4
4444
4444
4444
5
5555
5555
5555
6
6666
6666
6666
7
7777
7777
7777
Note: * Number set by bits IW2 to IW0 in ACR1 and bits DIW2 to DIW0 in DCR2
Rev. 5.00 Sep 11, 2006 page 296 of 916
REJ09B0332-0500