SH7065 Datasheet, PDF (766/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 19 256 kB Flash Memory (F-ZTAT)
Start
Set pins to boot program mode and execute
reset start
Host transfers data (H'00) continuously at
prescribed bit rate
SH7065 measures low period of H'00 data
transmitted by host
SH7065 calculates bit rate and sets value in bit
rate register
After bit rate adjustment, SH7065 transmits one
H'00 data byte to host to indicate end of
adjustment
Host confirms normal reception of bit rate
adjustment end indication (H'00), and transmits
one H'55 data byte
After receiving H'55, SH7065 transmits one
H'AA data byte to host
Host transmits number of user program bytes
(N), upper byte followed by lower byte
SH7065 transmits received number of bytes to
host as verify data (echo-back)
n=1
Host transmits user program sequentially in byte
units
SH7065 transmits received user program to host
as verify data (echo-back)
Transfer received programming control program
to on-chip RAM
n+1→n
No
n = N?
Yes
End of transmission
Check flash memory data, and if data has
already been written, erase all blocks
After confirming that all flash memory data has
been erased, SH7065 transmits one H'AA data
byte to host
Execute programming control program
transferred to on-chip RAM
Note: If a memory cell does not operate normally and cannot be erased, one H'FF byte is transmitted as an erase error,
and the erase operation and subsequent operations are halted.
Figure 19.9 Boot Mode Execution Procedure
Rev. 5.00 Sep 11, 2006 page 744 of 916
REJ09B0332-0500