SH7065 Datasheet, PDF (511/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 11 Motor Management Timer (MMT)
Bit 15—POE3 Flag (POE3F): Indicates that a high impedance request has been input to the
POE3 pin.
Bit 15: POE3F
0
1
Description
[Clearing condition]
(Initial value)
When 0 is written to POE3F after reading POE3F = 1
[Setting condition]
When the input set by bits 7 and 6 of ICSR occurs at the POE3 pin
Bit 14—POE2 Flag (POE2F): Indicates that a high impedance request has been input to the
POE2 pin.
Bit 14: POE2F
0
1
Description
[Clearing condition]
(Initial value)
When 0 is written to POE2F after reading POE2F = 1
[Setting condition]
When the input set by bits 5 and 4 of ICSR occurs at the POE2 pin
Bit 13—POE1 Flag (POE1F): Indicates that a high impedance request has been input to the
POE1 pin.
Bit 13: POE1F
0
1
Description
[Clearing condition]
(Initial value)
When 0 is written to POE1F after reading POE1F = 1
[Setting condition]
When the input set by bits 3 and 2 of ICSR occurs at the POE1 pin
Bit 12—POE0 Flag (POE0F): Indicates that a high impedance request has been input to the
POE0 pin.
Bit 12: POE0F
0
1
Description
[Clearing condition]
(Initial value)
When 0 is written to POE0F after reading POE0F = 1
[Setting condition]
When the input set by bits 1 and 0 of ICSR occurs at the POE0 pin
Bits 11 to 9—Reserved: These bits are always read as 0 and should only be written with 0.
Rev. 5.00 Sep 11, 2006 page 489 of 916
REJ09B0332-0500