SH7065 Datasheet, PDF (489/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 11 Motor Management Timer (MMT)
11.3.1 Sample Setting Procedure
An example of the operating mode setting procedure is shown in figure 11.2.
Halt count operation
Set TCNT
Clear the CST bit to 0 in the timer control register
(TCNR) to halt timer counter operation. Make the
operating mode setting while TCNT is halted.
Set 2Td (Td: dead time) in TCNT.
Set dead time carrier period
Set TBR
Set PWM output level
Set dead time Td in the dead time data register
(TDDR), set 1/2 the carrier period in the timer period
buffer register (TPBR), and set {TPBR value + 2Td} in
the timer period data register (TPDR).
Set the output {PWM duty initial value – Td} in the free
operation addresses of the buffer registers (TBRU,
TBRV, TBRW).
Set the PWM output level with bits OLSN and OLSP in
the timer mode register (TMDR).
Set operating mode
Set external pin functions
Set the operating mode in the timer mode register
(TMDR). The PUOA, PUOB, PVOA, PVOB, PWOA,
and PWOB pins are output pins.
Set the external pin functions with the pin function
controller (PFC).
Start count operation
Set the CST bit to 1 in TCNR to start the count
operation.
<Operating mode>
Figure 11.2 Sample Operating Mode Setting Procedure
Rev. 5.00 Sep 11, 2006 page 467 of 916
REJ09B0332-0500