SH7065 Datasheet, PDF (818/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 22 Electrical Characteristics
22.3.1 Clock Timing
Table 22.4 Clock Timing
Conditions: V_CC = PLLV_CC = 3.3 V ±0.3 V, PV_CC = 5.0 V ±0.5 V/3.3 V ±0.3 V, PV_CC ≥ V_CC,
AV_CC = 3.3 V ±0.3 V, V_SS = PLLV_SS = PV_SS = AV_SS = 0 V, Ta = –20°C to +75°C
Item
Operating frequency (master clock)
Clock cycle time
Clock low-level pulse width
Clock high-level pulse width
Clock rise time
Clock fall time
EXTAL/CKIO clock input frequency
EXTAL/CKIO clock input cycle time
EXTAL/CKIO clock input low-level pulse
width
EXTAL/CKIO clock input high-level pulse
width
EXTAL/CKIO clock input rise time
EXTAL/CKIO clock input fall time
Reset oscillation settling time
Standby recovery oscillation settling time
Symbol
fOP
tcyc
tCL
tCH
tCR
tCF
fEX
tEXcyc
tEXL
Min
20
16.7
4.4
4.4
—
—
5
33.3
11.6
tEXH
11.6
tEXR
—
tEXF
—
tOSC1
10
tOSC2
10
Max
60
50
—
—
4
4
30
200
—
—
5
5
—
—
Unit
MHz
ns
ns
ns
ns
ns
MHz
ns
ns
Figure
Figure 22.2
Figure 22.3
ns
ns
ns
ms
Figure 22.4
ms
Rev. 5.00 Sep 11, 2006 page 796 of 916
REJ09B0332-0500