SH7065 Datasheet, PDF (268/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 8 Bus State Controller (BSC)
8.2.9 Refresh Time Constant Register (RTCOR)
The refresh time constant register (RTCOR) is a 16-bit readable/writable register that specifies the
upper limit of the RTCNT counter. The RTCOR register and RTCNT counter values (lower 8 bits)
are constantly compared, and when they match the CMF bit is set in the RTCSR register and the
RTCNT counter is cleared to 0. If RFSH has been set to 1 and RMD has been cleared to 0 in
DRAM control register 3 (DCR3), CAS-before-RAS refreshing is performed. If the CMIE bit has
been set to 1 in RTCSR, a compare match interrupt (CMI) is generated.
RTCOR bits 15 to 8 are reserved; they are always read as 0 and should only be written with 0.
RTCOR is initialized to H'0000 by a power-on reset, but is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
RTCOR7 RTCOR6 RTCOR5 RTCOR4 RTCOR3 RTCOR2 RTCOR1 RTCOR0
Initial value:
0
0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 5.00 Sep 11, 2006 page 246 of 916
REJ09B0332-0500