SH7065 Datasheet, PDF (369/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 9 Direct Memory Access Controller (DMAC)
CKE
DREQ
FIFO
0
1 1 2 3 3 4 55 6 77 8
DRAK
BUS
DACK
CPU
DMA
(R)
DMA
(W)
CPU
DMA
(R)
DMA
(W)
CPU
DMA
(R)
DMA
(W)
CPU
DMA DMA
(R) (W)
CPU
(A)
(B)
(C)
(D)
(E)
Notes: 1. CKE:CKM = 1:1
2. Cycle steal mode/dual address transfer
3. Low level detection using 16-stage FIFO
4. DRAK and DACK are active-low.
Figure 9.14 Operation Example:
CKE = CKM, Low Level Detection, 16-Stage FIFO Used (1)
(Maximum-Speed Operation In Dual Address/Cycle Steal Mode)
Rev. 5.00 Sep 11, 2006 page 347 of 916
REJ09B0332-0500