SH7065 Datasheet, PDF (360/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 9 Direct Memory Access Controller (DMAC)
CKE
A25–A0
CSn
Transfer source
address
Transfer destination
address
D31–D0
RD
WRxx
DACK
TEND
Data read cycle Data write cycle
(1st)
(2nd)
Transfer from external memory space to external memory space, TEND output enabled,
DACK output in read cycle
Figure 9.8 Example of Dual Address Mode Transfer Timing
Rev. 5.00 Sep 11, 2006 page 338 of 916
REJ09B0332-0500