SH7065 Datasheet, PDF (67/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 2 CPU
Addressing Instruction
Mode
Format
Indexed GBR @(R0,GBR)
indirect
Effective Address Calculation Method
Effective address is sum of register GBR and
R0 contents.
Calculation
Formula
GBR + R0
GBR
+
GBR + R0
R0
PC-relative
with
displacement
@(disp:8,PC) Effective address is PC with 8-bit
displacement disp added. After disp is zero-
extended, it is multiplied by 2 (word) or 4
(longword), according to the operand size.
With a longword operand, the lower 2 bits
of PC are masked.
Word:
PC + disp × 2
Longword: PC &
H'FFFFFFFC +
disp × 4
PC
&^*
H'FFFFFFFC
+
disp
(zero-extended)
×
PC + disp × 2
or
PC & H'FFFFFFFC
+ disp × 4
2/4
*: _{With longword operand}
Rev. 5.00 Sep 11, 2006 page 45 of 916
REJ09B0332-0500