SH7065 Datasheet, PDF (718/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 17 Pin Function Controller (PFC)
Bits 15 to 3—Reserved: These bits are always read as 0 and should only be written with 0.
Bit 2—SCI Output Mode (SCIMD): Selects the function of the SCI output pins.
Bit 2: SCIMD
0
1
Description
Output by normal CMOS circuit
Output by open-drain circuit
(Initial value)
Bits 1 and 0—IRQOUT Mode 1 and 0 (IRQMD1, IRQMD0): These bits select the function of
the IRQOUT pin.
Bit 1: IRQMD1
0
1
Bit 0: IRQMD0
0
1
0
1
Description
Interrupt request acknowledge output (Initial value)
Refresh signal output
Interrupt request acknowledge or refresh signal output
(depending on the current operating state)
Always high-level output
17.4 PFC Restrictions
Note that the following bug may occur in the pin function controller (PFC).
Bug description and applicable pins
With the pins listed in table 17.12, if a PFC switch is made to the output mode of a specific
function and then a PFC switch is made again to other function output, the pin may constantly be
fixed at low output.
However, there are no restrictions on PFC switching in input mode selection for any functions.
Also, the output of the specific function involved operates normally even if output is fixed low.
Rev. 5.00 Sep 11, 2006 page 696 of 916
REJ09B0332-0500