SH7065 Datasheet, PDF (459/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

10.6 Operation Timing
Section 10 16-Bit Timer Pulse Unit (TPU)
10.6.1 Input/Output Timing
TCNT Count Timing
Figure 10.33 shows TCNT count timing in input clock operation, and figure 10.34 shows TCNT
count timing in external clock operation.
Pφ
Internal clock
Falling edge
Rising edge
TCNT input
clock
TCNT
N–1
N
N+1
Figure 10.33 Count Timing in Internal Clock Operation
N+2
Pφ
External clock
Falling edge
Rising edge
Falling edge
TCNT input
clock
TCNT
N–1
N
N+1
Figure 10.34 Count Timing in External Clock Operation
N+2
Output Compare Output Timing
A compare match signal is generated in the final state in which TCNT and TGR match (the point
at which the count value matched by TCNT is updated). When a compare match signal is
generated, the output value set in TIOR is output at the output compare output pin (the TIOC pin).
Rev. 5.00 Sep 11, 2006 page 437 of 916
REJ09B0332-0500