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SH7065 Datasheet, PDF (616/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series
Section 14 Serial Communication Interface (SCI)
cleared to 0 automatically when all transmit FIFO data register (SCFTDR) writes by the DMAC
are completed.
When the RDF flag is set to 1 in SC1SSR, an RXI interrupt is requested. An RXI interrupt request
can activate the on-chip DMAC to perform data transfer. The RDF bit is cleared to 0 automatically
when all receive FIFO data register (SCFRDR) reads by the DMAC are completed.
When the ER or DR flag is set to 1 in SC2SSR, an ERI interrupt is requested. The on-chip DMAC
cannot be activated by an ERI interrupt request.
When the TEND flag is set to 1 in SC1SSR, a TEI interrupt is requested. The on-chip DMAC
cannot be activated by a TEI interrupt request.
A TXI interrupt indicates that transmit data can be written, and an RXI interrupt indicates that
there is receive data in SCFRDR. The TEI interrupt indicates that the transmit operation has
ended.
Table 14.13 SCI Interrupt Sources
Interrupt Source
ERI
RXI
TXI
TEI
Description
Receive error (ER or DR)
Receive FIFO data register full (RDF)
Transmit FIFO data register empty (TDFE)
Transmit end (TEND)
DMAC
Activation
Not possible
Possible
Possible
Not possible
Priority on
Reset Release
High
Low
14.5 Usage Notes
The following points should be noted when using the SCI.
SCFTDR Writing and the TDFE Flag
The TDFE flag in the serial status 1 register (SC1SSR) is set when the number of transmit data
bytes written in the transmit FIFO data register (SCFTDR) has fallen to or below the transmit
trigger number set by bits TTRG1 and TTRG0 in the FIFO control register (SCFCR). After TDFE
is set, transmit data up to the number of empty bytes in SCFTDR can be written, allowing efficient
continuous transmission.
If the number of data bytes written in SCFTDR is equal to or less than the transmit trigger number,
the TDFE flag will be set to 1 again after being read as 1 and cleared to 0. TDFE clearing should
Rev. 5.00 Sep 11, 2006 page 594 of 916
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