SH7065 Datasheet, PDF (823/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 22 Electrical Characteristics
Item
CAS delay time 1
CAS delay time 2
Symbol
tCASD1
tCASD2
Min
2^*3
2^*3
Max
25
25
Read data access
time
Access time from
read strobe
Access time from
column address
Access time from
RAS
Access time from
CAS
tACC^*1
tOE^*1
tAA^*1
tRAC^*1
tCAC^*1
tcyc × (n+1.5) – 33 —
tcyc × (n+1) – 33
—
tcyc × (n+1.5) – 33 —
tcyc × (n+RCD+2) —
– 33
tcyc × (n+1) – 33
—
Unit Figure
ns Figure 22.12, Figure 22.13,
ns
Figure 22.14, Figure 22.15,
Figure 22.16, Figure 22.17,
Figure 22.18
ns Figure 22.9, Figure 22.10
ns
ns Figure 22.12, Figure 22.14,
Figure 22.15
ns
ns
Row address hold tRAH
time
tcyc × (RCD+0.5) —
– 25
ns Figure 22.12, Figure 22.15
Row address setup tASR
tcyc × 0.5 – 16.6
—
ns
time
Data input setup
tDS
time
tcyc × (m+0.5) – 25 —
ns Figure 22.12, Figure 22.14,
Figure 22.15
Data input hold
tDH
tcyc
time
—
ns
Notes: n is the number of waits. m is 0 when the number of DRAM write cycle waits is 0, and 1
otherwise. RCD is the set value of the RCD bit in DCR1.
1. The tRDS specification need not be met as long as the access time specification is met.
2. tWDH (max) is a reference value.
3. The minimum (Min) values for delay times are reference values.
4. tRDS is a reference value.
Rev. 5.00 Sep 11, 2006 page 801 of 916
REJ09B0332-0500