SH7065 Datasheet, PDF (648/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 16 D/A Converter
Bit 6—D/A Output Enable 0 (DAOE0): Controls D/A conversion and analog output.
Bit 6: DAOE0
0
1
Description
DA0 analog output is disabled
(Initial value)
Channel 0 D/A conversion and DA0 analog output are enabled
Bit 5—D/A Enable (DAE): Controls D/A conversion, together with bits DAOE0 and DAOE1.
When the DAE bit is cleared to 0, D/A conversion is controlled independently in channels 0 and 1.
Bit 7:
DAOE1
0
1
Bit 6:
DAOE0
0
1
0
1
Bit 5:
DAE
0
1
0
1
0
1
0
1
Description
Channel 1
Channel 0
D/A
Analog
Conversion Output
D/A
Analog
Conversion Output
Halted
Halted
Halted
Halted
Executed
Executed
Halted
Executed
Executed
Executed
Executed
Halted
Halted
Executed
Executed
When using the A/D converter and D/A converter simultaneously, set the DAE bit to 1. This will
prevent the noise associated with the start of A/D converter operation.
When the DAE bit is set to 1, even if bits DAOE0 and DAOE1 in DACR and the ADST bit in
ADCSR are cleared to 0, the same current is drawn from the analog power supply as during
simultaneous A/D and D/A conversion.
Bits 4 to 0—Reserved: Read-only bits, always read as 1.
Rev. 5.00 Sep 11, 2006 page 626 of 916
REJ09B0332-0500