English
Language : 

SH7065 Datasheet, PDF (623/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series
Section 15 A/D Converter
Section 15 A/D Converter
15.1 Overview
The on-chip A/D converter has 10-bit resolution and allows selection of up to 8 analog input
channels.
The A/D converter is composed of two independent modules, A/D0 and A/D1.
15.1.1 Features
The A/D converter has the following features:
• 10-bit resolution
• Eight input channels (4 channels × 2)
• Conversion time
Minimum conversion time (per channel): 6.7 µs (20 MHz, CKS = 1)
Operating frequency: Pφ > 20 MHz, CKS = 0
Pφ ≤ 20 MHz, CKS = 0, 1
• Choice of conversion mode
Single mode or multi mode can be selected.
Conversion can be carried out simultaneously on two channels.
• Three conversion start methods
Software, timer conversion start trigger (MMT), TPU or ADTRG pin can be selected.
• Eight A/D data registers
Conversion results are held in 16-bit data registers for each channel.
• Sample and hold function
• A/D conversion end interrupt
An A/D conversion end interrupt (ADI) can be requested on completion of A/D conversion.
The DMAC can be activated by ADI0 (A/D0 interrupt request) and ADI1 (A/D1 interrupt
request).
15.1.2 Block Diagram
Figure 15.1 shows a block diagram of the A/D converter.
AVCC and AVSS for both A/D modules are common pins in the chip.
Rev. 5.00 Sep 11, 2006 page 601 of 916
REJ09B0332-0500