SH7065 Datasheet, PDF (226/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 7 User Break Controller (UBC)
7.1.2 Block Diagram
Figure 7.1 shows a block diagram of the UBC.
Module bus
UBBR
UBAMRH
UBAMRL
UBARH
UBARL
Break condition comparator
User break
interrupt
generator
Legend:
UBARH, UBARL: User break address registers H and L
UBAMRH, UBAMRL: User break address mask registers H and L
UBBR:
User break bus cycle register
Figure 7.1 Block Diagram of UBC
Interrupt
request
Interrupt controller
Rev. 5.00 Sep 11, 2006 page 204 of 916
REJ09B0332-0500