SH7065 Datasheet, PDF (495/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 11 Motor Management Timer (MMT)
Compare Output Waveform: The compare output waveform is generated by comparing the
values in the TCNT counter and the TGR registers.
For compare output waveform U phase A (CMOUA), 0 is output if TGRUU > TCNT in the T1
interval (when TCNT is counting up), and 1 is output if TGRUU ≤ TCNT. In the T2 interval
(when TCNT is counting down), 0 is output if TGRU > TCNT, and 1 is output if TGRU ≤ TCNT.
For compare output waveform U phase B (CMOUB), 1 is output if TGRU > TCNT in the T1
interval, and 0 is output if TGRU ≤ TCNT. In the T2 interval, 1 is output if TGRUD > TCNT, and
0 is output if TGRUD ≤ TCNT.
Dead Time Generation Waveform: For dead time generation waveform U phase A (DTGUA)
and B (DTGUB), 1 is output as the initial value.
TDCNT0 starts counting at the falling edge of CMOUA. DTGUA outputs 0 while TDCNT0 is
counting, and 1 otherwise.
TDCNT1 starts counting at the falling edge of CMOUB. DTGUB outputs 0 while TDCNT1 is
counting, and 1 otherwise.
Output Generation Waveform: Output generation waveform U phase A (OGUA) is generated
by ANDing CMOUA and DTGUB, and output generation waveform U phase B (OGUB) is
generated by ANDing CMOUB and DTGUA.
PWM Waveform: The PWM waveform is generated by converting the output generation
waveform to the output level set in bits OLSN and OLSP in the timer mode register (TMDR).
Figure 11.5 shows an example of PWM waveform generation (operating mode 3, OLSN = 1,
OLSP = 1).
Rev. 5.00 Sep 11, 2006 page 473 of 916
REJ09B0332-0500