SH7065 Datasheet, PDF (883/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Appendix B Pin States
4. Chip select signal for accessed area is low, other chip select signals are high.
5. Asserted low in accordance with BS timing.
6. Output at high level in accordance with AH timing.
7. Signal for accessed area is asserted low, and other signals go high, at timing in accordance with DRAM access
strobe waveform.
8. In EDO mode only, asserted low in accordance with OE timing.
Rev. 5.00 Sep 11, 2006 page 861 of 916
REJ09B0332-0500