SH7065 Datasheet, PDF (212/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 6 Interrupt Controller (INTC)
6.3.2 Interrupt Control Register 1 (ICR1)
Bit: 15
14
13
12
NMIL^*
—
—
—
Initial value: —
0
0
0
R/W: R
—
—
—
11
10
9
—
EXIMD
—
0
0
0
—
R/W
—
8
NMIE
0
R/W
Bit: 7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: —
—
—
—
—
—
—
—
Note: * 1 when NMI pin input is high, 0 when low.
Interrupt control register 1 (ICR1) is a 16-bit register that sets the input signal detection mode for
external interrupt input pins NMI and IRQ7 to IRQ0, and indicates the input level at the NMI pin.
ICR1 is initialized to H'0000 or H'8000 by a power-on reset. It is not initialized in standby mode.
Bit 15—NMI Input Level (NMIL): The level of the signal input to the NMI pin is set in this bit.
This bit can be read to determine the NMI pin level. It cannot be modified.
Bit 15: NMIL
0
1
Description
NMI pin input level is low
NMI pin input level is high
Bits 14 to 11—Reserved: These bits are always read as 0 and cannot be modified.
Bit 10—External Interrupt Vector Mode Select (EXIMD): This bit selects IRQ mode or IRL
mode. In IRQ mode, each of signals IRQ7 to IRQ0 functions as a separate interrupt source. In IRL
mode, signals IRQ3 to IRQ0 specify an interrupt priority level from 1 to 15, and each of signals
IRQ7 to IRQ4 functions as a separate interrupt source.
Bit 10: EXIMD
0
1
Description
IRQ mode
IRL mode
(Initial value)
Bit 9—Reserved: This bit is always read as 0 and cannot be modified.
Rev. 5.00 Sep 11, 2006 page 190 of 916
REJ09B0332-0500