SH7065 Datasheet, PDF (647/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

16.2 Register Descriptions
Section 16 D/A Converter
16.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1)
Bit:
7
6
5
4
3
2
1
0
Initial value:
0
0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
D/A data registers 0 and 1 (DADR0 and DADR1) are 8-bit readable/writable registers that store
the data to be converted. When analog output is enabled, the values in DADR0 and DADR1 are
constantly converted and output at the analog output pins.
The D/A data registers are initialized to H'00 by a reset and in standby mode.
16.2.2 D/A Control Register (DACR)
Bit:
7
6
5
4
3
2
1
0
DAOE1 DAOE0 DAE
—
—
—
—
—
Initial value:
0
0
0
1
1
1
1
1
R/W: R/W
R/W
R/W
—
—
—
—
—
The D/A control register (DACR) is an 8-bit readable/writable register that controls the operation
of the D/A converter.
DACR is initialized to H'1F by a reset and in standby mode.
Bit 7—D/A Output Enable 1 (DAOE1): Controls D/A conversion and analog output.
Bit 7: DAOE1
0
1
Description
DA1 analog output is disabled
(Initial value)
Channel 1 D/A conversion and DA1 analog output are enabled
Rev. 5.00 Sep 11, 2006 page 625 of 916
REJ09B0332-0500