SH7065 Datasheet, PDF (201/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 6 Interrupt Controller (INTC)
6.1.3 Pin Configuration
Table 6.1 shows the INTC pin configuration.
Table 6.1 INTC Pins
Pin Name
NMI
IRQ7–IRQ0
IRQOUT
I/O
Input
Input
Output
Function
Input of nonmaskable interrupt request signal
Input of maskable interrupt request signals
Output of signal indicating interrupt source occurrence
6.1.4 Register Configuration
The INTC has the 15 registers shown in table 6.2. The functions of these registers include interrupt
priority level setting and control of external interrupt input signal detection.
Table 6.2 INTC Registers
Name
Abbreviation R/W Initial Value Address
Access Size
Interrupt priority register A IPRA
R/W H'0000
H'FFFF 1050 8, 16, 32
Interrupt priority register B IPRB
R/W H'0000
H'FFFF 1052 8, 16, 32
Interrupt priority register C IPRC
R/W H'0000
H'FFFF 1054 8, 16, 32
Interrupt priority register D IPRD
R/W H'0000
H'FFFF 1056 8, 16, 32
Interrupt priority register E IPRE
R/W H'0000
H'FFFF 1058 8, 16, 32
Interrupt priority register F IPRF
R/W H'0000
H'FFFF 105A 8, 16, 32
Interrupt priority register G IPRG
R/W H'0000
H'FFFF 105C 8, 16, 32
Interrupt priority register H IPRH
R/W H'0000
H'FFFF 105E 8, 16, 32
Interrupt priority register I IPRI
R/W H'0000
H'FFFF 1060 8, 16, 32
Interrupt priority register J IPRJ
R/W H'0000
H'FFFF 1062 8, 16, 32
Interrupt priority register K IPRK
R/W H'0000
H'FFFF 1064 8, 16, 32
Interrupt priority register L
Interrupt control register 1
IPRL
ICR1
R/W
R/W
H'0000
*¹
H'FFFF 1066 8, 16, 32
H'FFFF 106E 8, 16, 32
Interrupt control register 2
IRQ status register
ICR2
ISR
R/W H'0000
R/(W)^*2 H'0000
H'FFFF 1070 8, 16, 32
H'FFFF 1072 8, 16, 32
Notes: 1. Bit 15 (NMIL) indicates the level of the signal being input to the NMI pin. For details, see
section 6.3.2, Interrupt Control Register 1 (ICR1).
2. See section 6.3.4, IRQ Status Register (ISR), for details.
Rev. 5.00 Sep 11, 2006 page 179 of 916
REJ09B0332-0500