SH7065 Datasheet, PDF (706/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 17 Pin Function Controller (PFC)
17.3.18 Port E IO Register L (PEIORL)
Bit: 15
14
13
12
11
10
9
8
PE15IOR PE14IOR PE13IOR PE12IOR —
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Port E IO register L (PEIORL) is a 16-bit readable/writable register that selects the input/output
direction of pins in port E. Bits PE15IOR to PE12IOR correspond to pins PE15/IRQ7 to
PE12/IRQ4. PEIORL is enabled when port E pins function as general input/output pins (PE15 to
PE12), and disabled otherwise.
When port E pins function as PE15 to PE12, a pin becomes an output when the corresponding bit
in PEIORL is set to 1, and an input when the bit is cleared to 0.
PEIORL is initialized to H'0000 by an external power-on reset, but is not initialized by a WDT
reset, in standby mode, or in sleep mode.
17.3.19 Port E Control Register H2 (PECRH2)
Bit:
Initial value:
R/W:
15
PE23
MD1
0
R/W
14
PE23
MD0
0
R/W
13
PE22
MD1
0
R/W
12
PE22
MD0
0
R/W
11
PE21
MD1
0
R/W
10
PE21
MD0
0
R/W
9
PE20
MD1
0
R/W
8
PE20
MD0
0
R/W
Bit:
Initial value:
R/W:
7
PE19
MD1
0
R/W
6
PE19
MD0
0
R/W
5
PE18
MD1
0
R/W
4
PE18
MD0
0
R/W
3
PE17
MD1
0
R/W
2
PE17
MD0
0
R/W
1
PE16
MD1
0
R/W
0
PE16
MD0
0
R/W
Rev. 5.00 Sep 11, 2006 page 684 of 916
REJ09B0332-0500