SH7065 Datasheet, PDF (248/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 8 Bus State Controller (BSC)
Table 8.3 Address Maps
• In on-chip ROM disabled modes
Addresses
Type of Space
Type of Memory Size
Bus Width
H'0000 0000 to H'03FF FFFF CS0 space
Normal space
64 MB 8/16/32 bits
H'0400 0000 to H'07FF FFFF
H'0800 0000 to H'0BFF FFFF
H'0C00 0000 to H'0FFF FFFF
CS1 space
CS2 space
CS3 space
Normal space/
multiplexed I/O
space
64 MB
64 MB
64 MB
8/16/32 bits
8/16/32 bits
8/16/32 bits
H'1000 0000 to H'3FFF FFFF Reserved
Reserved
H'4000 0000 to H'43FF FFFF CS4 space
DRAM
64 MB 8/16/32 bits
H'4400 0000 to H'47FF FFFF CS5 space
64 MB 8/16/32 bits
H'4800 0000 to H'57FF FFFF
H'5800 0000 to H'5803 FFFF
Reserved
On-chip ROM^*
Reserved
On-chip ROM^*
256 kB 32 bits
H'5804 0000 to H'FFFE FFFF Reserved
Reserved
H'FFFF 0000 to H'FFFF 13FF On-chip peripheral On-chip peripheral 5 kB
module
module
8/16 bits
H'FFFF 1400 to H'FFFF 7FFF Reserved
Reserved
H'FFFF 8000 to H'FFFF 8FFF XRAM
XRAM
4 kB
32 bits
H'FFFF 9000 to H'FFFF 9FFF Reserved
Reserved
H'FFFF A000 to H'FFFF AFFF YRAM
YRAM
4 kB
32 bits
H'FFFF B000 to H'FFFF FFFF Reserved
Reserved
Note: * In this mode, the power-on reset vector table is located in the CS0 space (external
space). Also, addresses H'5800 0000 to H'5803 FFFF can be used as on-chip ROM.
Rev. 5.00 Sep 11, 2006 page 226 of 916
REJ09B0332-0500