SH7065 Datasheet, PDF (726/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 18 I/O Ports (I/O)
18.3.1 Register Configuration
The port B registers are shown in table 18.3.
Table 18.3 Port B Registers
Name
Port B data register H
Port B data register L
Abbreviation R/W
PBDRH
R/W
PBDRL
R/W
Initial Value
H'0000
H'0000
Address
H'FFFF 1210
H'FFFF 1212
Access Size
8, 16, 32
8, 16, 32
18.3.2 Port B Data Register H (PBDRH)
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
PB23DR PB22DR PB21DR PB20DR PB19DR PB18DR PB17DR PB16DR
Initial value:
0
0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port B data register H (PBDRH) is a 16-bit readable/writable register that stores port B data. Bits
PB23DR to PB16DR correspond to pins PB23/CASHH1/TXD1/TEND0 to PB16/CASLL0.
When a pin functions as a general output, if a value is written to PBDRH, that value is output
directly from the pin, and if PBDRH is read, the register value is returned directly regardless of the
pin state.
When a pin functions as a general input, if PBDRH is read the pin state, not the register value, is
returned directly. If a value is written to PBDRH, although that value is written into PBDRH it
does not affect the pin state. Table 18.4 summarizes port B data register read/write operations.
PBDRH is initialized by an external power-on reset, but is not initialized by a WDT reset or in
standby mode or sleep mode.
Rev. 5.00 Sep 11, 2006 page 704 of 916
REJ09B0332-0500