SH7065 Datasheet, PDF (486/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 11 Motor Management Timer (MMT)
11.2.6 Timer General Registers (TGR)
The timer general registers (TGR) function as 16-bit compare registers. The MMT has nine TGR
registers, which are compared with the TCNT counter in the operating modes.
The TGR registers are initialized to H'FFFF by a power-on reset and in standby mode. They are
not initialized in module standby mode. Only 16-bit access can be used on the TGR registers; 8-bit
access is not possible.
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
11.2.7 Timer Dead Time Counters (TDCNT)
The timer dead time counters (TDCNT) are 16-bit read-only counters.
The TDCNT counters are initialized to H'0000 by a power-on reset and in standby mode. They are
not initialized in module standby mode. Only 16-bit access can be used on the TDCNT counters;
8-bit access is not possible.
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R R R R
Rev. 5.00 Sep 11, 2006 page 464 of 916
REJ09B0332-0500