SH7065 Datasheet, PDF (629/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 15 A/D Converter
Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the interrupt request (ADI) at the end
of A/D conversion.
Bit 6: ADIE
0
1
Description
A/D end interrupt request (ADI) is disabled
A/D end interrupt request (ADI) is enabled
(Initial value)
Bit 5—A/D Start (ADST): Starts or stops A/D conversion. The ADST bit remains set to 1 during
A/D conversion. It can also be set to 1 by a conversion start trigger from a timer (MMT, TPU),
and by means of the A/D conversion trigger input pin (ADTRG).
Bit 5: ADST
0
1
Description
A/D conversion is stopped
(Initial value)
• Single mode: A/D conversion is started. ADST is automatically cleared to 0
when A/D conversion ends on the specified channel.
• Multi mode: A/D conversion is started. Conversion continues, once on each
channel in turn, until ADST is cleared to 0 by software.
Bit 4—Multi Mode (MULTI): Selects single mode or multi mode as the A/D conversion mode.
For details of the operation in single mode and multi mode, see section 15.4, Operation. Change
the mode only when ADST = 0.
Bit 4: MULTI
0
1
Description
Single mode
Multi mode
(initial value)
Bit 3—Clock Select (CKS): Sets the A/D conversion time. Change the conversion time only
when ADST = 0.
Bit 3: CKS
0
1
Description
Conversion time = 266 states (max.)
Conversion time = 134 states (max.)
(Initial value)
Bit 2—Reserved: This bit is always read as 0 and should only be written with 0.
Bits 1 and 0—Channel Select 1 and 0 (CH1, CH0): These bits, together with the multi mode bit,
select the analog input channels. Change the channel selection only when ADST = 0.
Rev. 5.00 Sep 11, 2006 page 607 of 916
REJ09B0332-0500