SH7065 Datasheet, PDF (598/941 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series

Section 14 Serial Communication Interface (SCI)
Figure 14.15 shows an example of SCI operation for multiprocessor format reception.
1
Serial
data
Start
bit Data (ID1)
0 D0 D1
Stop Start Data
MPB _{bit bit (Data1)}
D7 1 1 0 D0 D1
MPIE
RDF
Stop
MPB bit
1
D7 0
1 Idle state
(mark state)
SCFRDR value
ID1
RXI interrupt request
(multiprocessor interrupt)
MPIE = 0
SCFRDR data read
and RDF flag cleared
to 0 by RXI interrupt
handler
As data is not this
station’s ID, MPIE
bit is set to 1 again
(a) Data does not match station’s ID
RXI interrupt request
is not generated,
and SCFRDR retains
its state
1
Serial
data
Start
bit Data (ID2)
0 D0 D1
Stop Start Data
MPB _{bit bit (Data2)}
D7 1 1 0 D0 D1
Stop
MPB bit
1
D7 0
1 Idle state
(mark state)
MPIE
RDF
SCFRDR value
ID1
ID2
Data2
RXI interrupt request
(multiprocessor interrupt)
MPIE = 0
SCFRDR data read
and RDF flag cleared
to 0 by RXI interrupt
handler
As data matches this
station’s ID, reception
continues and data is
received by RXI interrupt
handler
MPIE bit set
to 1 again
(b) Data matches station’s ID
Figure 14.15 Example of SCI Receive Operation
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit, LSB-First Transfer)
Rev. 5.00 Sep 11, 2006 page 576 of 916
REJ09B0332-0500